static constexpr void *computed_opcode[] = {
	[RV32I_BC_INVALID] = &&execute_invalid,
	[RV32I_BC_ADDI] = &&rv32i_addi,
	[RV32I_BC_LI] = &&rv32i_li,
	[RV32I_BC_MV] = &&rv32i_mv,
	[RV32I_BC_SLLI] = &&rv32i_slli,
	[RV32I_BC_SLTI] = &&rv32i_slti,
	[RV32I_BC_SLTIU] = &&rv32i_sltiu,
	[RV32I_BC_XORI] = &&rv32i_xori,
	[RV32I_BC_SRLI] = &&rv32i_srli,
	[RV32I_BC_SRAI] = &&rv32i_srai,
	[RV32I_BC_ORI] = &&rv32i_ori,
	[RV32I_BC_ANDI] = &&rv32i_andi,

	[RV32I_BC_LUI] = &&rv32i_lui,
	[RV32I_BC_AUIPC] = &&rv32i_auipc,

	[RV32I_BC_LDB] = &&rv32i_ldb,
	[RV32I_BC_LDBU] = &&rv32i_ldbu,
	[RV32I_BC_LDH] = &&rv32i_ldh,
	[RV32I_BC_LDHU] = &&rv32i_ldhu,
	[RV32I_BC_LDW] = &&rv32i_ldw,

	[RV32I_BC_STB] = &&rv32i_stb,
	[RV32I_BC_STH] = &&rv32i_sth,
	[RV32I_BC_STW] = &&rv32i_stw,
#ifdef RISCV_64I
	[RV32I_BC_LDWU] = &&rv32i_ldwu,
	[RV32I_BC_LDD] = &&rv32i_ldd,
	[RV32I_BC_STD] = &&rv32i_std,
#endif

	[RV32I_BC_BEQ] = &&rv32i_beq,
	[RV32I_BC_BNE] = &&rv32i_bne,
	[RV32I_BC_BLT] = &&rv32i_blt,
	[RV32I_BC_BGE] = &&rv32i_bge,
	[RV32I_BC_BLTU] = &&rv32i_bltu,
	[RV32I_BC_BGEU] = &&rv32i_bgeu,
	[RV32I_BC_BEQ_FW] = &&rv32i_beq_fw,
	[RV32I_BC_BNE_FW] = &&rv32i_bne_fw,

	[RV32I_BC_JAL] = &&rv32i_jal,
	[RV32I_BC_JALR] = &&rv32i_jalr,
	[RV32I_BC_FAST_JAL] = &&rv32i_fast_jal,
	[RV32I_BC_FAST_CALL] = &&rv32i_fast_call,

	[RV32I_BC_OP_ADD] = &&rv32i_op_add,
	[RV32I_BC_OP_SUB] = &&rv32i_op_sub,
	[RV32I_BC_OP_SLL] = &&rv32i_op_sll,
	[RV32I_BC_OP_SLT] = &&rv32i_op_slt,
	[RV32I_BC_OP_SLTU] = &&rv32i_op_sltu,
	[RV32I_BC_OP_XOR] = &&rv32i_op_xor,
	[RV32I_BC_OP_SRL] = &&rv32i_op_srl,
	[RV32I_BC_OP_OR] = &&rv32i_op_or,
	[RV32I_BC_OP_AND] = &&rv32i_op_and,
	[RV32I_BC_OP_MUL] = &&rv32i_op_mul,
	[RV32I_BC_OP_DIV] = &&rv32i_op_div,
	[RV32I_BC_OP_DIVU] = &&rv32i_op_divu,
	[RV32I_BC_OP_REM] = &&rv32i_op_rem,
	[RV32I_BC_OP_REMU] = &&rv32i_op_remu,
	[RV32I_BC_OP_SRA] = &&rv32i_op_sra,
	[RV32I_BC_OP_ZEXT_H] = &&rv32i_op_zext_h,
	[RV32I_BC_OP_SH1ADD] = &&rv32i_op_sh1add,
	[RV32I_BC_OP_SH2ADD] = &&rv32i_op_sh2add,
	[RV32I_BC_OP_SH3ADD] = &&rv32i_op_sh3add,

	[RV32I_BC_SEXT_B] = &&rv32i_sext_b,
	[RV32I_BC_SEXT_H] = &&rv32i_sext_h,
	[RV32I_BC_BSETI] = &&rv32i_bseti,
	[RV32I_BC_BEXTI] = &&rv32i_bexti,

#ifdef RISCV_64I
	[RV64I_BC_ADDIW] = &&rv64i_addiw,
	[RV64I_BC_SLLIW] = &&rv64i_slliw,
	[RV64I_BC_SRLIW] = &&rv64i_srliw,
	[RV64I_BC_SRAIW] = &&rv64i_sraiw,
	[RV64I_BC_OP_ADDW] = &&rv64i_op_addw,
	[RV64I_BC_OP_SUBW] = &&rv64i_op_subw,
	[RV64I_BC_OP_MULW] = &&rv64i_op_mulw,
	[RV64I_BC_OP_ADD_UW] = &&rv64i_op_add_uw,
	[RV64I_BC_OP_SH1ADD_UW] = &&rv64i_op_sh1add_uw,
	[RV64I_BC_OP_SH2ADD_UW] = &&rv64i_op_sh2add_uw,
#endif // RISCV_64I

#ifdef RISCV_EXT_COMPRESSED
	[RV32C_BC_ADDI] = &&rv32c_addi,
	[RV32C_BC_LI] = &&rv32c_addi,
	[RV32C_BC_MV] = &&rv32c_mv,
	[RV32C_BC_SLLI] = &&rv32c_slli,
	[RV32C_BC_BEQZ] = &&rv32c_beqz,
	[RV32C_BC_BNEZ] = &&rv32c_bnez,
	[RV32C_BC_JMP] = &&rv32c_jmp,
	[RV32C_BC_JR] = &&rv32c_jr,
	[RV32C_BC_JAL_ADDIW] = &&rv32c_jal_addiw,
	[RV32C_BC_JALR] = &&rv32c_jalr,
	[RV32C_BC_LDD] = &&rv32c_ldd,
	[RV32C_BC_STD] = &&rv32c_std,
	[RV32C_BC_LDW] = &&rv32c_ldw,
	[RV32C_BC_STW] = &&rv32c_stw,
	[RV32C_BC_SRLI] = &&rv32c_srli,
	[RV32C_BC_ANDI] = &&rv32c_andi,
	[RV32C_BC_ADD]  = &&rv32c_add,
	[RV32C_BC_XOR]  = &&rv32c_xor,
	[RV32C_BC_OR]   = &&rv32c_or,
	[RV32C_BC_FUNCTION] = &&rv32c_func,
#endif

	[RV32I_BC_SYSCALL] = &&rv32i_syscall,
	[RV32I_BC_STOP] = &&rv32i_stop,

	[RV32F_BC_FLW] = &&rv32i_flw,
	[RV32F_BC_FLD] = &&rv32i_fld,
	[RV32F_BC_FSW] = &&rv32i_fsw,
	[RV32F_BC_FSD] = &&rv32i_fsd,
	[RV32F_BC_FADD] = &&rv32f_fadd,
	[RV32F_BC_FSUB] = &&rv32f_fsub,
	[RV32F_BC_FMUL] = &&rv32f_fmul,
	[RV32F_BC_FDIV] = &&rv32f_fdiv,
	[RV32F_BC_FMADD] = &&rv32f_fmadd,
#ifdef RISCV_EXT_VECTOR
	[RV32V_BC_VLE32] = &&rv32v_vle32,
	[RV32V_BC_VSE32] = &&rv32v_vse32,
	[RV32V_BC_VFADD_VV] = &&rv32v_vfadd_vv,
	[RV32V_BC_VFMUL_VF] = &&rv32v_vfmul_vf,
#endif
	[RV32I_BC_FUNCTION]  = &&execute_decoded_function,
	[RV32I_BC_FUNCBLOCK] = &&execute_function_block,
#ifdef RISCV_BINARY_TRANSLATION
	[RV32I_BC_TRANSLATOR] = &&translated_function,
#endif
	[RV32I_BC_LIVEPATCH]  = &&execute_livepatch,
	[RV32I_BC_SYSTEM] = &&rv32i_system,
};
